1. Field of the Invention
This invention relates to a logic circuit device using insulated-gate field effect transistors (referred to hereinafter as MISFET's), and more particularly to a semiconductor read-only memory (referred to hereinafter as a ROM) comprising a plurality of MISFET's connected in parallel with a single output line.
2. Description of the Prior Art
A mask programmable ROM comprising MISFET's is commonly known in the art. This ROM is of the so-called lateral type in which a plurality of MISFET's are connected in parallel with one another across a single output line and a reference potential source. In the ROM of this lateral type, an active MISFET is disposed in a predetermined memory cell position when it is desired to store, for example, a binary signal "1" in this specific memory cell position, while an MISFET having a thick gate insulating oxide film and not making any transistor action is disposed in such a specific memory cell position when conversely it is desired to store a binary signal "0" in such memory cell position. In the known ROM of the lateral type, active MISFET's can be selectively disposed in any desired memory cell positions using a suitable photo-etching mask during formation of the MISFET's including the active MISFET's. It will thus be seen that, in the known ROM of the lateral type, the pattern of a photo-etching mask used generally for the manufacture of a semiconductor device is suitably modified so that desired information can be written in the memory cells of the ROM according to a predetermined program instructing the storage of the information, and the photo-etching mask is used for changing the relative thickness of the gate insulating oxide film of the MISFET's.
The present inventor has investigated a ROM of a serial type previously proposed in the company to which he belongs. The structure of this serial type ROM is such that a plurality of MISFET's are connected in series with each other across a single output line and a reference potential source. In the proposed ROM of the serial type, a mask is used for selectively providing MISFET's of depletion mode among those connected in series thereby writing desired information. According to this proposal, an MIS ROM having a very high packing density can be obtained, and the yield rate can be greatly improved due to the fact that the ROM can be simply and easily manufactured. Such advantages can be obtained because multi-layer wiring of aluminum is unnecessary due to the fact that MISFET's of depletion mode and those of enhancement mode are arranged in matrix in this MIS ROM of the serial type. Further, such multi-layer wiring is also unnecessary even in the area in which the source or drain regions cross the polycrystalline silicon layers providing the gates. Furthermore, due to the fact that the drain region of each individual MISFET can be formed for use in common to the source region of the adjacent MISFET's, the drain regions of all the MISFET's need not be connected to an earth line unlike prior art MIS ROM's, and it is also unnecessary to provide contact holes for electrical connection to multi-layer wiring of aluminum.
The ROM of this serial type must be of ratioless structure in order that the memory is a capable of delivering a power source level output with a sufficiently large amplitude. However, when this serial ratioless structure is applied to a chip selecting ROM, a register selecting ROM or like ROM of a small capacity associated with a ROM of the serial type, which usually has a large memory capacity, means including a flip-flop circuit are required to receive the output of the ROM, or timing means for controlling the precharging or like timing are required, resulting in a trouble such as undesirable occurrence of a time lag. Therefore, in a ROM having a relatively small capacity, it is desirable to utilize the merit of the serial type while, at the same time, employing the commonly known lateral ratio structure, rather than employing the serial ratioless structure. In such a case, however, it is necessary, for the purpose of writing desired information, to employ two kinds of masks, that is, a mask for forming MISFET's of depletion mode in a ROM of the serial type and another mask for changing the relative thickness of the gate insulating oxide film in a ROM of the lateral type. The necessity for preparation of the two kinds of masks has led to troublesome and complex steps for the manufacture of the ROM of the kind described resulting in an uneconomical increase in the manufacturing cost.